1. Field of the Invention
The present invention relates to voltage controlled oscillator (VCO) circuits, and in particular, to VCO circuits using circuit parameter clamping techniques for stabilizing free run frequencies.
2. Description of the Related Art
Referring to FIG. 1, a typical phase lock loop (PLL) circuit 10 includes an integrated circuit 12 having a phase detector 14, VCO 16 and feedback divider 18 integrated therein and interconnected substantially as shown. In accordance with well-known conventional PLL principles, a referenced clock source 20 provides a reference clock signal 21. The phase detector 14 compares this signal 21 with a feedback signal 19 which is generally a frequency-divided version of the output signal 17 from the VCO. The feedback divider 18 is typically a counter that is programmable as to the divisor by which the frequency of the VCO signal 17 is divided.
The phase detector output signal 15 includes a DC component representing the phase difference between the two input signals 21, 19, plus numerous higher frequencies components as well. These higher frequency components are filtered out using a low pass filter 22 which is external to the integrated circuit 12. It is the low pass filtered signal 23, which is essentially a virtual DC signal, that is used to drive the VCO 16 and thereby control the frequency of its output signal 17.
Frequently, this type of circuit 10 is used in a free running, or xe2x80x9cunmodulated,xe2x80x9d mode in which the output signal 15 from the phase detector 14, which is a xe2x80x9cmodulationxe2x80x9d signal inasmuch as it is used to control, e.g., xe2x80x9cmodulate,xe2x80x9d the frequency of the VCO 16, is disabled or otherwise disconnected. This is done so as to allow the VCO 16 to run in its free run, or unmodulated, mode. Ideally, it is generally desirable that the frequency of the VCO signal remain substantially constant during this mode of operation. However, due to a number of factors, this is often not the case. For example, as is well known, the semiconductor devices used to implement the VCO 16 have a number of operating characteristics (e.g., threshold voltage, saturation voltage and current, channel resistivity, etc.) that can be affected by many things, including variations in ambient operating temperature and variations in the fabrication processes used to fabricate the semiconductor devices. As a result, the frequency of the VCO 17 can have variations in its frequency introduced.
Referring to FIG. 2, at least two conventional techniques have been developed to address this problem. (As indicated, a common implementation of a VCO 16 includes a voltage-to-current (V:I) conversion circuit 40 that converts the input control voltage 23 to one or more control currents 41a, 41b. which, in turn, control the operating frequency of a current controlled oscillator (ICO) 42.) One technique involves the use of a DC voltage source 30 to apply a clamping voltage at the input 23 of the VCO 16. This is achieved by using an operational amplifier A1 with a diode D1 in its feedback circuit to buffer an input DC voltage and apply it to the input 23 of the VCO 16. As a solution, however, this technique is only partially successful. For example, variations in the operating characteristics of the semiconductor devices within the VCO 16, e.g., as caused by variations in operating temperature or fabrication processes, will cause the frequency of the VCO signal 17 to vary, notwithstanding the constant DC voltage at the input 23.
Another technique involves the use of current clamping by mixing static currents 11, 12 with the individual output currents 41a, 41b of the V:I converter 40 within the VCO 16. However, this approach also is only partially successful. The VCO 16 will often still have poor phase jitter performance due to the difficulty in generating a low noise static current, i.e., using current sources 52 and 54, in those applications involving mixed signal circuits or high-speed large signal analog amplifier circuits.
Accordingly, it would be desirable to have a technique for clamping a voltage or current controlled oscillator in such a manner as to significantly reduce any frequency variations or phase jitter introduced by variations in semiconductor device operating characteristics or on-chip noise.
An integrated circuit with a voltage-controlled oscillator that provides an oscillation signal with an unmodulated frequency that remains constant in response to reception of a bias current having a constant magnitude and with a modulated frequency that varies in response to reception of a modulation voltage, in accordance with one embodiment of the present invention, includes a current-to-voltage conversion circuit, a voltage-to-current conversion circuit and a current-controlled oscillator circuit. The current-to-voltage conversion circuit includes a portion of a plurality of integrated, like semiconductor devices with a plurality of operating characteristics and generates, in response to reception of a bias current, a control voltage with a magnitude corresponding to a magnitude of the bias current. The voltage-to-current conversion circuit includes another portion of the plurality of integrated, like semiconductor devices, is coupled to the current-to-voltage conversion circuit and generates, in response to reception of the control voltage and a modulation voltage, a control current with a magnitude that corresponds to a magnitude of the modulation voltage during reception of the modulation voltage; and corresponds to the control voltage magnitude otherwise The current-controlled oscillator circuit includes still another portion of the plurality of integrated, like semiconductor devices, is coupled to the voltage-to-current conversion circuit and generates, in response to reception of the control current, an oscillation signal with an unmodulated frequency corresponding to the bias current magnitude and with a modulated frequency corresponding to the modulation voltage. The unmodulated frequency is defined by the bias current magnitude substantially irrespective of variations in respective ones of the plurality of operating characteristics caused by variations in operating temperatures and processes of fabrication of the plurality of integrated, like semiconductor devices.